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RMPA39200
June 2004
RMPA39200
37-40 GHz 1.6 Watt Power Amplifier MMIC
General Description
The Fairchild Semiconductor's RMPA39200 is a high efficiency power amplifier designed for use in point to point and point to multi-point radios, and various communications applications. The RMPA39200 is a 3-stage GaAs MMIC amplifier utilizing our advanced 0.15m gate length Power PHEMT process and can be used in conjunction with other driver or power amplifiers to achieve the required total power output.
Features
* 19dB small signal gain (typ.) * 32dBm power out (typ.) * Circuit contains individual source vias * Chip size 4.28mm x 3.19mm
Device
Absolute Ratings
Symbol Vd Vg Vdg ID PIN TC TSTG RJC Parameter Positive DC Voltage (+5V Typical) Negative DC Voltage Simultaneous (Vd-Vg) Positive DC Current RF Input Power (from 50 source) Operating Baseplate Temperature Storage Temperature Range Thermal Resistance (Channel to Backside) Ratings +6 -2 +8 2352 20 -30 to +85 -55 to +125 8 Units V V V mA dBm C C C/W
(c)2004 Fairchild Semiconductor Corporation
RMPA39200 Rev. C
RMPA39200
Electrical Characteristics (At 25C), 50 system, Vd = +5V, Quiescent current (Idq) = 1600mA
Parameter Frequency Range Gate Supply Voltage (Vg)1 Gain Small Signal (Pin = 0dBm) (f = 37-38.5GHz) (f = 38.5-40GHz) Gain Variation vs. Frequency Power Output at 1dBm Compression (f = 37-38.5GHz) (f = 38.5-40GHz) Power Output Saturated (Pin = +16dBm) (f = 37-38.5GHz) (f = 38.5-40GHz) Drain Current at Pin = 0dBm Drain Current at P1dB Compression Power Added Efficiency (PAE) at P1dB OIP3 (17dbm/Tone) (10MHz Tone Sep.) Input Return Loss (Pin = 0dBm) Output Return Loss (Pin = 0dBm)
Note: 1. Typical range of negative gate voltages is -0.5 to 0.0V to set typical Idq of 1600 mA.
Min 37
Typ -0.2
Max 40
Units GHz V dB dB dB dBm dBm dBm dBm mA mA % dBm dB dB
17 16
19 17 1.5 31 30
31 30
32 31 1600 1700 17 37 10 10
(c)2004 Fairchild Semiconductor Corporation
RMPA39200 Rev. C
RMPA39200
Application Information
CAUTION: THIS IS AN ESD SENSITIVE DEVICE.
Chip carrier material should be selected to have GaAs compatible thermal coefficient of expansion and high thermal conductivity such as copper molybdenum or copper tungsten. The chip carrier should be machined, finished flat, plated with gold over nickel and should be capable of withstanding 325C for 15 minutes. Die attachment for power devices should utilize Gold/Tin (80/20) eutectic alloy solder and should avoid hydrogen environment for PHEMT devices. Note that the backside of the chip is gold plated and is used as RF and DC ground. These GaAs devices should be handled with care and stored in dry nitrogen environment to prevent contamination of bonding surfaces. These are ESD sensitive devices and should be handled with appropriate precaution including the use of wrist grounding straps. All die attach and wire/ribbon bond equipment must be well grounded to prevent static discharges through the device. Recommended wire bonding uses 3mils wide and 0.5mil thick gold ribbon with lengths as short as practical allowing for appropriate stress relief. The RF input and output bonds should be typically 0.012" long corresponding to a typical 2mil gap between the chip and the substrate material.
DRAIN SUPPLY (VDA & VDB)
MMIC CHIP
RF IN
RF OUT
GROUND (Back of the Chip)
GATE SUPPLY (VGA & VGB)
Figure 1. Functional Block Diagram
3.194 3.010
1.827 1.597 1.367
0.184 0.0 0.0 0.205 0.889 1.954 2.426 2.954 3.500 4.282
Dimensions in mm
Figure 2. Chip Layout and Bond Pad Locations (Chip Size is 4.282mm x 3.194mm x 50m. Back of chip is RF and DC Ground)
(c)2004 Fairchild Semiconductor Corporation RMPA39200 Rev. C
RMPA39200
DRAIN SUPPLY (Vd = +5V) (Connect to both VDA & VDB) 10000pF L 100pF BOND WIRE Ls L MMIC CHIP
RF IN
RF OUT
L GROUND (Back of Chip) 100pF BOND WIRE Ls L 10000pF
GATE SUPPLY (Vg) (VGA and/or VGB)
Figure 3. Recommended Application Schematic Circuit Diagram
(c)2004 Fairchild Semiconductor Corporation
RMPA39200 Rev. C
RMPA39200
Vg (NEGATIVE)
10000pF
10000pF
Vd (POSITIVE) DIE-ATTACH 80Au/20Sn
2 MIL GAP 100pF 100pF
5 MIL THICK ALUMINA 50
5 MIL THICK ALUMINA 50
RF INPUT
RF OUTPUT
L < 0.015" (4 Places)
100pF 10000pF
100pF 10000pF
Vg (NEGATIVE)
Vd (POSITIVE)
Note: Use 0.003" by 0.0005" Gold Ribbon for bonding. RF input and output bonds should be less than 0.015" long with stress relief. Vd should be biased from 1 supply on both sides as shown. Vg can be biased from either or both sides from 1 supply.
Figure 4. Recommended Assembly and Bonding Diagram
(c)2004 Fairchild Semiconductor Corporation
RMPA39200 Rev. C
RMPA39200
Recommended Procedure for Biasing and Operation
CAUTION: LOSS OF GATE VOLTAGE (Vg) WHILE DRAIN VOLTAGE (Vd) IS PRESENT MAY DAMAGE THE AMPLIFIER CHIP. The following sequence of steps must be followed to properly test the amplifier. Step 1: Turn off RF input power. Step 2: Connect the DC supply grounds to the ground of the chip carrier. Slowly apply negative gate bias supply voltage of -1.5V to Vg. Step 3: Slowly apply positive drain bias supply voltage of +5V to Vd. Step 4: Adjust gate bias voltage to set the quiescent current of Idq = 1600mA. Step 5: After the bias condition is established, the RF input signal may now be applied at the appropriate frequency band. Step 6: Follow turn-off sequence of: (i) Turn off RF input power, (ii) Turn down and off drain voltage (Vd), (iii) Turn down and off gate bias voltage (Vg). Note: An example auto bias sequencing circuit to apply negative gate voltage and positive drain voltage for the above procedure is shown below.
D3 D1N6098 +6V D2 D1N6098 R1 3.0k
+ V+ 0 1 2
C1 0.1F
R3 1.0k
*
U2
AD820/AD
V-
LM2941T U1A 7400
3 2 CNT 5 4 IN OUT 3 GND
+2.62V R4 1.2k
-
MMIC_+VDD C3 22F
R2 6.8k
0
0
C2 0.47F R6
0 1k
ADJ 1
R5 3k
0
0
*Adj. For -Vg
MMIC_-VG C4 0.1F R7 8.2k R8 1.0k
0 0
-5V
*-5V Off: +3.33V
-5V Off: +1.80V
0
C5 0.1F
(c)2004 Fairchild Semiconductor Corporation
RMPA39200 Rev. C
RMPA39200
Typical Characteristics
RMPA39200 S-Parameters vs. Frequency Bias Vd = 5V, Id = 1600mA, T = 25C
25 20
S21
RMPA39200 Power and LS Gain @ P1dB vs. Frequency Bias Vd = 5V, Id = 1600mA, T = 25C
30 20 10 0
35
P1dB
OUTPUT POWER (dBm)
GAIN (dB)
15 10
S11
RETURN LOSS (dB)
30 25 20 15 10 3 37 38 FREQUENCY (GHz) 39 40
LARGE SIGNAL GAIN
5 0 -5 34 35 36 37 38 39 40 41
S22
-10 -20 -30 42
FREQUENCY (GHz)
RMPA39200 Gain vs. Power Out Freq. = 37 to 40GHz, Bias Vd = 5V, Id = 1600mA, T = 25C
22 21 20 GAIN (dB) 19 18 40GHz 17 16 15 14 14 16 18 20 22 24 26 28 30 32 34
39GHz 38GHz 37GHz
RMPA39200 OIP3 vs. Pout/Tone Vd = 5V, Idq = 1600mA, T = 25C, 10MHz Tone Sep
41 40 39 OIP3L (dBm)
37GHz 39GHz 40GHz 38GHz
38 37 36 35 34 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 Pout/TONE (dBm)
Pout (dBm)
(c)2004 Fairchild Semiconductor Corporation
RMPA39200 Rev. C
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
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DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I11

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